Biting the hand that feeds IT
Biting the hand that feeds IT
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Original URL: http://www.theregister.co.uk/2008/03/21/clearspeed_three/
Floating point whiz ClearSpeed continues to try and make coding for its specialized hardware easier.
The company this week touted the release of Version 3.0 of its mainline code. As you might expect, the package includes a variety of additions to simplify the process of moving code off a general purpose x86 chip and onto ClearSpeed’s CX600 accelerators.
ClearSpeed offers the code in a couple of different forms. There’s a free base package that includes runtime libraries, drivers and a CSXL library with BLAS and LAPACK functions. The developer package, however, is the juicier bit.
With Version 3.0, developers receive a revamped optimizing compiler, better use of on-chip memory and fresh Vector Math Library and Random Number Generator Library functions. We’re also told that "this software release includes ease-of-use improvements to the programming model incorporating operator overloading to simplify the use of vector data types."
Along with improving the innards of its code, ClearSpeed has tied an existing Visual Profiler tool into the “cycle-accurate simulator” on its CSX600 cards. The combination of these two sets of technology allow customers to produce graphical representations of performance information between the ClearSpeed cards and general purpose CPUs in a system.
ClearSpeed is awful proud of its software, claiming that it makes life as easy as Jimbo "Willypedia" Wales (http://www.theregister.co.uk/2008/03/03/jimbo_wales_rachel_marsden/) on developers who want to run their floating-point heavy code on accelerators. The company reckons that scientific applications such as Amber and Bude will run up to 20 per cent faster on Version 3.0 vs. 2.51.
The fresh software will work with Red Hat Enterprise Linux 5, SuSE Enterprise Linux 10, Windows Server 2003 and Windows Computer Cluster Server 2003.
Despite gaining high-profile wins in some very large clusters, ClearSpeed has been forced to go through a period of layoffs. The company fears that a pullback in spending by financial services firms – hurt by their own irresponsibility – will slow sales of its accelerators. ®
ClearSpeed clears out staff (4 February 2008)
http://www.theregister.co.uk/2008/02/04/layoffs_clearspeed/
GPGPUs and FPGAs are now fully implanted in our brains (20 November 2007)
http://www.theregister.co.uk/2007/11/20/accelerators_fpga_gpu_sc07/
HP accelerates server accelerator effort (1 November 2007)
http://www.theregister.co.uk/2007/11/01/hp_accelerator_push/
ClearSpeed plots 1 TeraFlop floating point pizza box (21 September 2007)
http://www.theregister.co.uk/2007/09/21/1u_teraflop_clearspeed/
HPC bar goes lower and wider (27 June 2007)
http://www.theregister.co.uk/2007/06/27/hpc_goes_low/
ClearSpeed finds PCIe floating point booster (4 May 2007)
http://www.theregister.co.uk/2007/05/04/clearspeed_pcie/
Intel targets '09 for Geneseo (16 April 2007)
http://www.theregister.co.uk/2007/04/16/intel_geneseo_09/
Blade innovations highlight energy efficiency opportunities (11 January 2007)
http://www.theregister.co.uk/2007/01/11/blade_energy_efficiency/
ClearSpeed commits to 5x floating point boost (18 November 2006)
http://www.theregister.co.uk/2006/11/18/clearspeed_silicon_sc06/
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